Jian Weng (翁健)
6th-year Ph.D Candidate
404 Westwood Plaza EVI #468
Los Angeles, CA 90095
Jian Weng will finish his Ph.D. program at UCLA this September, and join KAUST's
Computer Science of CEMSE Division this October as an Assistant Professor.
His research interests lie everything related to hardware/software co-designed acceleration, including but not limited to
designing and analyzing accelerators, accelerator-associated software stack from abstraction to compiler transformations,
as well as the design automation techniques. His works have been recognized with one IEEE Micro Top Picks Honorable Mentions,
and one MICRO Best Paper Runner-up.
I will be actively looking for self-motivated and hard-working Ph.D. students with experiences in compiler infrastructures,
RTL implementation, and architecture simulators. If you are interested, feel free to send me your CV and research interests
to [first-name].[last-name].hirephd -at- gmail.com.
I am willing to share all the lessons learned from my job search season (from fall 2022 to spring 2023),
especially not very successful parts for you to escape those unnecessary pitfalls.
Feel free to reach out for more details, and grab my cv,
research statement, teaching statement,
and diversity statement for your academic package preparation.
International Symposium on Microarchitecture (MICRO'22) 83/369
Best Paper Runner-up
International Symposium on High-Performance Computer Architecture (HPCA'22) 80/262
IEEE Micro Special Issue on Compiling for Accelerators IF=2.821
International Symposium on Code Generation and Optimization (CGO'21) 31/89
International Symposium on Computer Architecture (ISCA'20) 77/421
Selected as IEEE Micro Honorable Mentions in Computer Architecture 2021 12/120
International Symposium on High-Performance Computer Architecture (HPCA'21) 63/258
Best Paper Runner-up
International Symposium on High-Performance Computer Architecture (HPCA'20) 48/248
Computer Architecture Letters (CAL'19) IF=2.118
International Symposium on Microarchitecture (MICRO'19) 80/345
Selected as IEEE Micro Top Picks in Computer Architecture 2020
Parallel Architectures and Compilation Techniques (PACT'18) 36/126
Tutorial & Workshop
International Symposium on Microarchitecture (MICRO'22)
1st Workshop on Democratizing Domain-Specific Accelerators (WDDSA @MICRO'22)
Workshop on Languages, Tools, and Techniques for Accelerator Design (LATTE @ASPLOS'21)
DSAGEN: Democratizing Decoupled Spatial Architecture Research
International Symposium on Microarchitecture (MICRO'20)